Saving (exporting) the syhthesized circuit

The synthesized circuit can be saved:

• either as a netlist (an EDIF, VHDL or XNF file);
• or, as a boolean function (a PLA or BEX file).

To export the synthesized circuit as a netlist:

• Choose from the main menu File->Export as netlist;
• Choose the wanted file type from the submenu that appear;
  
• In the "<file_type> File selection" dialog box input a file name;

• Click the OK button.

To export the synthesized circuit as a boolean function, just select File->Export as boolean function, select the desired circuit type (PLA or BEX) and perform the same steps as above.